Langdao Silex has unveiled a prototype EUV lithography light source, with the company estimating that commercial production remains 3–5 years away.
ASML and ZEISS plan to launch Hyper NA EUV lithography systems with 0.75 NA and 5nm resolution within the next decade, citing depth of focus as the main technical challenge.
Huawei is developing domestic EUV lithography technology while utilizing its proprietary LogicFolding 3D packaging to maintain performance without advanced manufacturing nodes.
Huawei is developing domestic EUV lithography equipment and implementing the 'tau law' strategy to boost chip performance without relying on shrinking transistor sizes alone.
Huawei executive Yu Chengdong stated that China is actively developing EUV lithography equipment while utilizing 'Logic Folding' technology to bypass current manufacturing limitations.
ASML maintains its focus on laser-produced plasma technology for EUV lithography, targeting 1000W power output while dismissing the immediate viability of free-electron laser alternatives.
ASML has fully booked its EUV scanner production through 2027 and is expanding capacity with a new plant to meet surging AI-driven demand.
ASML plans to introduce 12-inch photomasks for High-NA EUV lithography by 2033 to boost production efficiency by 40 percent and support larger AI chip designs.
TSMC has outlined its roadmap for adopting High-NA EUV lithography, with high-volume production scheduled for 2030 and a transition to larger 6x12-inch photomasks by 2033.
Samsung and ASML are partnering to develop 12-inch photomask technology and integrate High NA EUV lithography for DRAM production by 2028.
Intel has processed over one million wafers using High-NA EUV technology, outpacing the rest of the industry while pushing for a new 6x12-inch photomask standard to improve production efficiency.
