Marvell Announces Second-Gen Structera X CXL Controllers
Marvell has unveiled its second-generation Structera X CXL memory controllers, featuring industry-first support for six memory channels and sharing capabilities across four hosts.

Marvell has unveiled its second-generation Structera X CXL memory controllers, featuring industry-first support for six memory channels and sharing capabilities across four hosts.

Marvell Technology has unveiled its second-generation Structera X CXL memory expanders, featuring six-channel support and up to 9 TB of capacity for AI inference workloads.

Huawei has unveiled XMFS, an experimental file system designed for CXL 3.0 servers that enables direct cross-node memory access via standard POSIX interfaces.

Huawei has unveiled its experimental XMFS file system, designed to optimize memory access across nodes in high-performance computing environments using CXL 3.0 technology.

Huawei has unveiled XMFS, an experimental file system designed to enable POSIX-compliant access to cross-node shared memory for servers using CXL 3.0 or Unified Bus technology.

Astera Labs has introduced the Leo X, Leo 2 E, and Leo 2 P series to its smart memory controller portfolio, targeting CXL 3.2 compliance and AI accelerator performance.

Kioxia is introducing new PCIe 6.0 SSDs and CXL-based memory expansion modules to help data centers mitigate DRAM shortages and improve AI workload performance.
