Yangtze Memory Technologies (YMTC) is expanding its operations from NAND flash into the DRAM market. According to Counterpoint Research, the company is developing LPDDR5X memory with a data transfer rate of 9600 MT/s, with plans to initiate mass production at its third wafer fabrication facility.
The company is utilizing a vertical channel transistor (VCT) and a 4F² memory cell architecture for its new DRAM project. This design aims to reduce the surface area occupied by each memory cell, potentially increasing integration density and lowering costs per unit of capacity.
YMTC has been testing second-generation 16Gb LPDDR5 memory with a target speed of 7500 MT/s at its second wafer plant since October 2025. This production line currently has a monthly capacity of approximately 5000 wafers, though the project remains in the research and testing phase.
The development of 4F² architecture is also being explored by ChangXin Memory Technologies (CXMT), which aims to launch DDR5 modules using this technology by the end of 2026. Meanwhile, international industry leaders like Micron have expressed skepticism regarding the technical feasibility of scaling 4F² structures.
YMTC's entry into the DRAM sector faces significant challenges, including manufacturing process stability, leakage control, and yield rates. Success will depend on the company's ability to pass validation from terminal device manufacturers and achieve competitive performance in power consumption and thermal management.
