Micron is developing Edge Inference Memory (EIM), a specialized memory chip designed for physical AI applications such as humanoid robots, autonomous driving, and AR/VR. The company announced this initiative at the SEDEX 2026 forum in Seoul. EIM aims to reduce data processing latency and increase system bandwidth by positioning itself between the AI processor and memory.
The EIM architecture involves vertically stacking low-power memory (LPDDR) on top of a logic chip. Micron is currently working on integrating EIM into LPDDR6 solutions, with mass production expected in the second half of 2028. Unlike Processing-in-Memory (PIM), which integrates computing units directly into memory, EIM's specific computing architecture remains undisclosed.
Current humanoid robots typically use LPDDR due to battery efficiency requirements, but rising AI model parameters are straining bandwidth. While current robot AI models feature 1B to 2B parameters, Micron expects a shift toward HBM architectures as more powerful visual language models are adopted. Future high-performance robots will require approximately 200GB of DRAM and 4TB of storage.
Micron is collaborating with robot manufacturers, chip designers, and cloud service providers during the early system design phase to address these hardware needs. The company notes that existing DRAM and storage architectures are struggling to meet the demands of the emerging physical AI market, which requires processing diverse sensory inputs like vision, sound, and touch.
