Huawei, working with HiSilicon and SMIC, aims to produce approximately 600,000 Ascend 910C AI accelerator chips in 2026. This target represents a doubling of previous output levels, contributing to a larger goal of manufacturing 1.6 million chips despite existing memory constraints and yield challenges.
The company introduced the LogicFolding architecture and the Tau Scaling Law. These concepts focus on efficient data movement and advanced packaging rather than traditional geometric scaling. Huawei claims this strategy could enable transistor densities similar to a 1.4nm process by 2031 without using restricted foreign lithography tools.
DeepSeek has ordered at least 160,000 next-generation Ascend 950DT accelerators. These chips are scheduled for deployment in a 1-gigawatt data center by late 2027 or early 2028.
According to Bernstein, Huawei is expected to hold about 50% of the Chinese AI chip market by 2026. In contrast, Nvidia's market share in China is projected to drop from 40% in 2025 to 8% in 2026.
SMIC currently lacks access to advanced ASML lithography systems, leaving its technology a generation behind TSMC and Samsung. The LogicFolding approach serves as an engineering workaround to bridge this gap. SMIC's stock price has risen following the architecture announcements.
