Researchers at the Institute of Microelectronics of the Chinese Academy of Sciences (IMECAS) have developed a preliminary process for creating gate-all-around (GAA) transistors using only DUV lithography equipment. This method relies on multi-patterning techniques to achieve 3nm-class structures, bypassing the need for restricted EUV scanners.
While this approach allows for advanced transistor construction, it significantly increases manufacturing complexity, costs, and the number of required exposures and masks. Chief engineer Ye Tianchun noted that the technology is in the early stages and requires further testing on production lines to determine its viability for mass manufacturing.
In 2025, the academy also introduced a solid-state coherent light source with a 193nm wavelength, intended for potential use in future lithography systems. However, this component is not yet a substitute for industrial-grade scanners from ASML.
Separately, Huawei Technologies is pursuing the Tau Scaling Law concept, introduced in May. The company aims to achieve performance density equivalent to 1.4nm process nodes by 2031 through architectural innovations and temporal scaling, rather than physical manufacturing process advancements.
