The AI inference startup d-Matrix aims to integrate its upcoming Raptor XPU into Nvidia's MGX rack architecture by the fourth quarter of 2027. The company plans to complete the first tape-out of the Raptor chip before the end of 2026.
The Raptor platform utilizes a TSMC 4nm logic die with 3D-stacked DRAM. Each card offers 32 GB of capacity and targets memory bandwidth exceeding 100 TB/s. The company claims the chip provides 4.7 times higher throughput for generative inference compared to HBM-based alternatives.
Integration with Nvidia's NVLink Fusion interconnect will allow up to 144 Raptor XPUs to function within a single fabric. The project involves collaboration with Astera Labs, while Alchip and Andes serve as broader ecosystem partners.
D-Matrix has secured between $450 million and $500 million in total funding. This includes a Series C round of $275 million, which resulted in a company valuation of approximately $2 billion. The firm currently produces its Corsair platform based on SRAM.
