The Institute of Microelectronics of the Chinese Academy of Sciences (IMECAS) has successfully fabricated functional gate-all-around (GAA) transistors using stacked nanosheet channels. The research team utilized DUV lithography for the process, aiming to develop technologies for 3nm-class nodes without relying on EUV equipment.
Experimental results showed Ion/Ioff ratios of 9.7×10⁵ and 7.6×10⁵, surpassing the 5×10⁵ threshold. These figures confirm that the gate control of the stacked sheets is functional, allowing the transistors to distinguish between conducting and non-conducting states.
Despite the progress, IMECAS has not disclosed critical geometric parameters, such as gate pitch, metal pitch, or transistor density. The current work represents an early process integration rather than a complete manufacturing flow, as commercial production requires complex integration of etching, deposition, and metrology.
IMECAS has been developing these GAA technologies since 2020 as part of a national effort to reduce dependence on Western semiconductor tools and software. The project focuses on architectural innovation and optimizing mature fabrication technologies to advance semiconductor evolution in China.
