The upcoming AMD Medusa Point APU has appeared in a Geekbench listing, revealing a hybrid architecture. The processor features 10 cores and 20 threads, split into two distinct clusters consisting of four Zen 6 cores and six Zen 6c cores.
Technical specifications indicate that each core includes 32 KB of L1 instruction cache, 48 KB of L1 data cache, and 1 MB of L2 cache. The total L3 cache shared across all cores is 16 MB. The sample tested operated at a base frequency of 2.0 GHz.
The chip supports the full AVX-512 instruction set, including AVX512-FP16, AVX512-VNNI, and AVX-VNNI extensions. During the benchmark, the system utilized 55.58 GB of quad-channel DDR5 memory clocked at 5,188 MT/s.
Medusa Point is set to feature the RDNA 4m GPU variant. While the exact architecture remains under analysis, the presence of WMMA and SWMMAC instructions suggests compatibility with the GFX1170 GPU, which is expected to support FSR 4.
