Hardware
Implementing MIPI-CSI-2 Video Pipelines on Zynq-7020
Developers implemented a custom video pipeline on Zynq-7020, achieving 1080p30 output by optimizing MIPI-CSI-2 receiver delays and memory configurations.
October 5, 2026, 10:05 AM·Хабр

Developers implemented a custom video pipeline on Zynq-7020, achieving 1080p30 output by optimizing MIPI-CSI-2 receiver delays and memory configurations.
