Hardware
Lam Research Explores SA-CFET Architecture for 1nm Transistors
Lam Research has proposed a new SA-CFET transistor architecture for 1nm nodes, which reduces 6T SRAM cell area by 52.7% compared to N3 technology.
October 5, 2026, 01:55 AM·IT之家

Lam Research has proposed a new SA-CFET transistor architecture for 1nm nodes, which reduces 6T SRAM cell area by 52.7% compared to N3 technology.
