AMD and Intel have integrated their joint AI Compute Extensions (ACEv1) specification into the GCC 17 development branch as of September 2, 2026. This standard aims to unify AI acceleration across the x86 architecture, providing a common target for software developers regardless of the chip manufacturer.
The ACEv1 architecture utilizes outer-product instructions to achieve up to 16 times the compute density of AVX10 operations. It supports low-precision numerical formats, including INT8, FP8, and BF16, which are optimized for AI inference and machine learning tasks.
Although based on concepts from Intel’s Advanced Matrix Extensions (AMX), ACEv1 is not backward-compatible with the older standard. The specification was initially published in June 2026 by the x86 Ecosystem Advisory Group, an organization established by both companies in 2024.
Full support for the extensions is expected in the GCC 17.1 release, scheduled for March or April 2027. Hardware implementation of ACEv1 is not anticipated before 2028, with AMD suggesting these capabilities may debut in its Zen 7 processor architecture.
