The project explores using RISC-V atomic instructions to manage a monochrome video adapter on a DE0-CV FPGA board. By utilizing AMO.OR and AMO.AND operations, the developer avoids explicit memory read cycles during pixel manipulation, a common bottleneck in bit-mapped displays.
The implementation targets a 640x480 resolution at 25 MHz pixel clock. The system leverages the dual-port memory of the Cyclone V chip to handle simultaneous display output and processor operations. The design stays within a 64 KB memory footprint for the video buffer.
The developer expanded the design to support 12-bit color, inspired by the ZX Spectrum frame buffer model. This setup uses 16 bits per color for a 32-bit word, requiring an additional 20 KB of resources. The system supports 8x8 sprites and custom font rendering.
The code was optimized to eliminate branching in the pixel-plotting function. By using GCC built-in functions, the developer achieved direct memory writes for pixel updates. The final system was tested by rendering an XBM image converted via GIMP.
