Chinese manufacturer CXMT has announced plans to begin mass production of advanced DDR5 memory featuring vertical transistor architecture by the end of 2026. The company intends to target the server market with these new RDIMM modules.
The new 4F2 architecture utilizes a vertical transistor layout, which improves gate control, reduces leakage currents, and mitigates short-channel effects. This design allows for higher transistor density compared to the industry-standard 6F2 architecture, enabling the production of higher-capacity memory chips.
CXMT has transitioned to hybrid wafer bonding, allowing for the independent optimization of memory cells and CMOS structures. The company currently holds over 300 patent families related to the 4F2 architecture.
The firm currently ranks fourth globally among DRAM suppliers. Following the launch of LPDDR6 in August and fifth-generation DRAM in September, this latest development is intended to strengthen the company's position in the data center infrastructure market.
