Celero is developing a coherent digital signal processor (DSP) optimized for AI workloads. The company claims its technology offers lower latency and reduced power consumption compared to existing chips.
The startup's product engineering has reached a significant milestone by validating a chip version that utilizes a 2-nanometer process. This semiconductor technology from TSMC provides 15% better performance than the previous generation.
The 2-nanometer design supports 1.6T and 3.2T interconnects, enabling the data transmission of up to 3.2 terabits per second per port. The company's DSP can power both long-haul links between data centers and internal networks, supporting scale-up and scale-out networking.
Celero will use the newly raised capital to accelerate its product development and manufacturing roadmap.
