The Neoverse CSS N4 platform is built on TSMC's N3P process. It allows for a flexible configuration of cores, ranging from 8 to 128 Neoverse N4 cores per chip, with a maximum clock speed of 3.8 GHz.
The subsystem supports up to 256 MB of L3 cache and 2 MB of L2 cache per core, along with 64 KB L1 instruction and 64 KB L1 data caches. Memory support now includes DDR5 and LPDDR6.
I/O capabilities have been upgraded to support up to 128 lanes of PCIe 7.0 or PCIe 6.0 and are compatible with the CXL 4.0 standard. The platform also supports the UCIe chiplet interconnect standard.
Compared to the CSS N2, which supported up to 64 cores, 64 MB of L3 cache, and 64 PCIe 5.0 lanes, the N4 offers significant increases in core count and bandwidth. In a 128-core configuration at 3 GHz, it delivers double the single-socket performance of the N3 platform, with a 25% increase in performance per watt and 75% higher memory bandwidth.
Arm also shared progress on its AGI CPU project based on the Neoverse V3 architecture. This project has gained support from companies including Meta, OpenAI, ByteDance, Oracle, Cloudflare, and SAP.
